--- title: 'EEE 415 - Microprocessor and Embedded Systems' url: 'https://eee.buet.ac.bd/academics/undergraduate/courses/eee415' markdown: 'https://eee.buet.ac.bd/academics/undergraduate/courses/eee415.md' date: '2026-04-28' description: 'EEE 415 - Microprocessor and Embedded Systems Section A: General Information Course Title: Microprocessor and Embedded Systems Type of Course: Compulsory, Theory Offered to: EEE Pre-requisite Course(s): None Section B: Course Details Course Content (As approved by the Academic Council) F…' taxonomy: archives_month: - apr_2026 archives_year: - '2026' --- # EEE 415 - Microprocessor and Embedded Systems ## Section A: General Information - **Course Title:** Microprocessor and Embedded Systems - **Type of Course:** Compulsory, Theory - **Offered to:** EEE - **Pre-requisite Course(s):** None ## Section B: Course Details ### Course Content (As approved by the Academic Council) Fundamentals of microprocessor and computer design, processor data path, architecture, microarchitecture, complexity, metrics, and benchmark; Instruction Set Architecture, introduction to CISC and RISC, Instruction-Level Parallelism, pipelining, pipelining hazards and data dependency, branch prediction, exceptions and limits, super-pipelined vs superscalar processing; Memory hierarchy and management, Direct Memory Access, Translation Lookaside Buffer; cache, cache policies, multi-level cache, cache performance; Multicore computing, message passing, shared memory, cache-coherence protocol, memory consistency, paging, Vector Processor, Graphics Processing Unit, IP Blocks, Single Instruction Multiple Data and SoC with microprocessors. Simple Arm/RISC-V based processor design with VerilogHDL Introduction to embedded systems design, software concurrency and Realtime Operating Systems, Arm Cortex M / RISC-V microcontroller architecture, registers and I/O, memory map and instruction sets, endianness and image, Assembly language programming of Arm Cortex M / RISC-V based embedded microprocessors (jump, call-return, stack, push and pop, shift, rotate, logic instructions, port operations, serial communication and interfacing), system clock, exceptions and interrupt handling, timing analysis of interrupts, general purpose digital interfacing, analog interfacing, timers: PWM, real-time clock, serial communication, SPI, I2C, UART protocols, Embedded Systems for Internet of Things (IoT) ### Course Objectives - Illustrate the architecture, programming and operating principle of an ARM microprocessor - Introduce Microprocessor design using VerilogHDL - Interpret assembly language programs by executing ARM instruction sets Introduce design of embedded systems and RTOS ### Knowledge required Fundamental understanding of concepts of EEE 303 Digital Electronics ### Course Outcomes | CO No. | CO Statement | Corresponding PO(s)\* | Domains and Taxonomy level(s)\*\* | Delivery Method(s) and Activity(-ies) | Assessment Tool(s) | |---|---|---|---|---|---| | CO1 | **Explain** the architecture, instruction set, memory and input/output interface of a ARM Microprocessor | PO(a) | C4 | Lectures, Handouts | Class test, Final exam | | CO2 | **Design** Embedded Systems solutions with relevant appropriate consideration | PO(e) | C3 | Lectures, Handouts | Class test, Final exam | | CO3 | **Illustrate** emerging technologies and trends in Microprocessor design to recognize the need to always learn the state-of-the art | PO(l) | C2 | -- | Video Presentation, Report | Cognitive Domain Taxonomy Levels: **C1** – Knowledge, **C2** – Comprehension, **C3** – Application, **C4** – Analysis, **C5** – Synthesis, **C6** – Evaluation, **Affective Domain Taxonomy Levels**: **A1**: Receive; **A2:** Respond; **A3:** Value (demonstrate); **A4:** Organize; **A5:** Characterize; **Psychomotor Domain Taxonomy Levels:** **P1:** Perception; **P2**: Set; **P3:** Guided Response; **P4:** Mechanism; **P5:** Complex Overt Response; **P6:** Adaptation; **P7:** Organization Program Outcomes (PO): **PO(a)** Engineering Knowledge, **PO(b)** Problem Analysis, **PO(c)** Design/development Solution, **PO(d)** Investigation, **PO(e)** Modern tool usage, **PO(f)** The Engineer and Society, **PO(g)** Environment and sustainability, **PO(h)** Ethics, **PO(i)** Individual work and team work, **PO(j)**. Communication, **PO(k)** Project management and finance, PO**(l)** Life-long Learning \* For details of program outcome (PO) statements, please see the departmental website or course curriculum ### Mapping of Knowledge Profile, Complex Engineering Problem Solving and Complex Engineering Activities | K1 | K2 | K3 | K4 | K5 | K6 | K7 | K8 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | A1 | A2 | A3 | A4 | A5 | |---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---| | 🗸 | 🗸 | 🗸 | 🗸 | | 🗸 | | | 🗸 | 🗸 | 🗸 | | | | | | | | | | ### Lecture Plan | **Week** | **Lectures** | **Topic** | **Textbook** | **COs** | |---|---|---|---|---| | 1 | 1-3 | Fundamentals of microprocessor and computer design, processor data path, architecture, microarchitecture, introduction to CISC and RISC, complexity, metrics, and benchmark | Patterson 1 | | | 2 | 4-6 | Assembly Language, | Harris 6.1-6.3 | | | 3 | 7-9 | Assembly Language Programming, | Harris 6.3 | | | 4 | 10-12 | Machine Language, Compiling, Assembling, | Harris 6.4 | | | 5 | 13-15 | Performance Analysis, Single Cycle and Multicycle Processor | Harris 7.1-7.4 | | | 6 | 16-18 | Pipelining, Hazards, Advanced Microarchitecture | Harris 7.5,7.7 | | | 7 | 19-21 | Memory Systems – Cache and Virtual Memory | Harris 8.2-8.4 | | | 8 | 20-24 | Introducing Embedded System Design, IoT, Arm Cortex m4 | Lecture Slides | | | 9 | 25-27 | General Purpose Input Output | Zhu 14 | | | 10 | 28-30 | General Purpose Timers | Zhu 15.1-15.3 | | | 11 | 31-33 | Interrupts | Zhu 11, 15.4 | | | 12 | 34-36 | ADC + DAC | Zhu 20,21 | | | 13 | 37-39 | Serial Communication | Zhu 22 | | ### Assessment Strategy - Class Participation: Class participation and attendance will be recorded in every class. - Continuous Assessment: Continuous assessment any of the activities such as quizzes, assignment, presentation, etc. The scheme of the continuous assessment for the course will be declared on the first day of classes. - One Video presentation will be prepared by individual students - Final Examination: A comprehensive term final examination will be held at the end of the Term following the guideline of academic Council. ### Distribution of Marks - Class Participation 10% - Continuous Assessment 20% - Final Examination 70% - Total 100% ### Textbook/References Sarah Harris, David Harris – “Digital Design and Computer Architecture, ARM Edition, Morgan Kaufmann (2015) David A. Patterson and John L. Hennessy, “Computer Organization and Design – The Hardware / Software Interface ARM edition” Morgan Kaufmann Yifeng Zhu “Embedded Systems with ARM Cortex-M Microcontrollers with Assembly Language and C” --- ## Navigation - Parent: [Courses](https://eee.buet.ac.bd/academics/undergraduate/courses.md) - Previous: [EEE 414 - Electrical Services Design](https://eee.buet.ac.bd/academics/undergraduate/courses/eee414.md) - Next: [EEE 416 - Microprocessor and Embedded Systems Laboratory](https://eee.buet.ac.bd/academics/undergraduate/courses/eee416.md)